소개글
기초 전자회로 실험 과목의 기말고사 텀 프로젝트로 설계한50W급 오디오 앰프 회로입니다.
차동증폭 방식에 +/- 25V, 2.5A의 전원으로 구동하며,
스테레오 출력으로 설계가 되어져 있습니다.
압축된 파일에는 보고서, PCB용 회로도, Pspice 시뮬레이션 용
회로도가 포함되어져 있으며, 이 외에도 PCB작업을 위한 각 종
Gerber 파일 또한 포함이 되어져 있습니다.
목차
1. Abstract - 본 프로젝트의 개요2. Object Of Design - 앰프설계의 목적
3. Amplifier Building Blocks - 앰프를 구성하는 각 단에 대한 설명
4. Components List - 소요된 자재의 리스트
5. Frequency Response Characteristics - 앰프의 주파수 응답 특성
6. Performance Test & Analysis - 성능시험 및 분석
7. Conclusion - 분석에 대한 결론
8. Reference - 앰프제작을 하면서 실제로 촬영한 사진 자료 및 참조한 부품의 데이터 시트
본문내용
1. Abstract이번 프로젝트는 지금까지 전자공학 실험을 통해서 학습한 지식을 이용하여 50W급 오디오 증폭기를 설계하는 것으로서, OP AMP와 대형 전력 트랜지스터 및 전압 레귤레이터 등의 다양한 능동 소자를 활용하여 요구되는 기능에 따라 블록별로 회로를 설계하고, 다시 얻어진 회로 블록들을 하나로 조합하여 대형 스피커를 충분히 구동할 수 있는 오디오 앰프를 만드는 것이다.
2. Objects of Design
본 프로젝트의 요구에 부응하는 회로를 설계하기 위해서 우리 조원들은 다음과 같은 설계사항들을 고려하였다. 그 첫째로 최대한 간단한 구성을 갖출 수 있도록 하는 것이었는데, 이를 위해서 회로의 구성에 필요한 기능이 집약되어 있는 아날로그 IC 부품들을 사용하는 쪽으로 회로의 설계 방향을 잡았으며, 사용되는 아날로그 IC를 선택하는 데에 있어서도 선형적인 신호의 변화에 대해서 충분히 대처할 수 있는 부품이 주로 사용되도록 하였다 그리고 둘째로는 낮은 임피던스 입력에 대해서도 문제없이 동작할 수 있도록 하는 것으로서 이는 OP AMP의 고 임피던스 특성을 활용하는 것에 대한 의견이 제시되었으며, 셋째인 전력증폭 효율을 최대한으로 이끌어 내는 것은 기존의 푸쉬풀(Push_Pull) 전력증폭 회로를 차동증폭 구동 형식으로 개조하는 방법을 선택하기로 하였다.
3. Amplifier Building Blocks
정상 설계 여부를 확인하는 데 오류를 최소화하고, 전체 설계를 이루는 회로의 부분들을 확실하게 파악하기 위하여 회로의 각 부는 기능에 따라 블록으로 나누었으며, 나눠진 회로의 블록들은 다음과 같다.
일반적인 MP3 플레이어나 PC 사운드카드의 이어폰 연결단자 등 낮은 임피던스를 가지고 있는 출력단에 대해서도 손실 없이 신호를 입력받도록 하는 역할을 하는 블록이며, 이러한 역할은 사용되는 OP AMP인 LF351의 매우 높은 임피던스(10GΩ정도)덕분에 가능하다. 그리고 높은 임피던스를 제공하는 것 외에도 이 블록은 OP AMP Follower 기능으로 미약한 입력신호의 전력을 다음 단의 블록들에 공급해도 충분할 정도로 약간의 전력증폭을 하는 버퍼(Buffer)의 기능 또한 한다.(좌,우가 유사한 형태의 회로를 가진다.)
2. Phase Splitter and Current Amplifier Driver Stage Block(위상 분할 및 전류증폭부 드라이버 단 블록)
차동증폭 방식으로 접속된 전류 증폭단을 구동할 수 있게 하기 위해서 하나의 위상(Phase)을 분할(Split)하는 기능을 제공하며, 전류증폭단의 트랜지스터를 OP AMP IC의 내부의 전력증폭단의 연장회로처럼 구동하는 블록으로서, 한 쪽은 입력신호를 그대로 받지만 다른 쪽은 이득이 1인 반전 증폭단을 거치게 하는 식으로 분할된 위상 신호를 얻으며, 일반적인 전압원처럼 기능하는 것이 아닌 전류원으로서 전류증폭단의 트랜지스터들의 베이스 단자를 구동한다.(좌,우가 유사한 형태의 회로를 가진다.) 전압이득은 미약한 신호에 대해서도 충분한 증폭효과를 나타내 보일 수 있도록 (1+(Rf/Ri))*2=(1+(50k/1k))*2=102, 즉 102배의 이득을 가질 수 있도록 설정을 하였다.(전압이득이 일반적인 비반전 증폭기의 이득의 2배가 되는 이유는 부하를 양 쪽에서 구동할 수 있도록 차동증폭 설정을 해 주었기 때문이다.)
참고 자료
없음압축파일 내 파일목록
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Term-Project_50W_Audio_Amplifier_Design(Result).hwp
Term-Project_50W_Audio_Amplifier_Design(Result).pdf
PCB Pattern - PDF Print Version/DESIGN1-17(BOTTOM).pdf
PCB Pattern - PDF Print Version/DESIGN1-17(Component_Location).pdf
PCB Pattern - PDF Print Version/DESIGN1-17(TOP).pdf
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Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC1/Test/Test.prb
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC1/SCHEMATIC1.ALS
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC1/SCHEMATIC1.net
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC1/SCHEMATIC1_sch.prp
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC1/Test.sim
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test/Test.1OP
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test/Test.cir
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test/Test.dat
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test/Test.mif
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test/Test.mrk
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test/Test.out
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test/Test.prb
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1/Test1.1OP
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1/Test1.cir
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1/Test1.dat
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1/Test1.mif
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1/Test1.mrk
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1/Test1.out
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1/Test1.prb
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/SCHEMATIC2.ALS
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/SCHEMATIC2.net
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/SCHEMATIC2_sch.prp
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test.sim
Schematic For Pspice Simulation/50W_Audio_Amplifier-PSpiceFiles/SCHEMATIC2/Test1.sim
Schematic For Pspice Simulation/50W_AUDIO_AMPLIFIER.DSN
Schematic For Pspice Simulation/50W_AUDIO_AMPLIFIER_0.DBK
Schematic For Pspice Simulation/50W_Audio_Amplifier.opj
Term-Project_50W_Audio_Amplifier_Design(Result).hwp
Term-Project_50W_Audio_Amplifier_Design(Result).pdf
PCB Pattern - PDF Print Version/DESIGN1-17(BOTTOM).pdf
PCB Pattern - PDF Print Version/DESIGN1-17(Component_Location).pdf
PCB Pattern - PDF Print Version/DESIGN1-17(TOP).pdf
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