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Fairchild has been enjoying tremendous success and growth over the last few years. As a Semiconductor Engineer, I always have been interesting Fairchild. My name ishong. After determining to complete Master course of electronic engineering in University, I have been working for Samsung Semiconductor (Foundry Industry) for 6 years as device Engineer.
I have been working for Magnachip as Process Integration Engineer since December 2010. I’m in charge of product for 0.18um, 0.16um tech. Besides, I have experience of GOI (Gate Oxide Integrity) evaluation, Yield Analysis, Process Simulation, RDL (Re-Distribution Layer) Process and TFR (Thin Film Resistor) development. Also I support the customer request for the quality, electrical test, physical FA and reliability.
When I was in University, I studied about Random Telegraph Signal Noise for NOR Flash Memory as gate length = 45nm, 65nm and 90nm using ATLAS Simulation tool. As a result of simulation, it was improved through optimized channel doping & pocket implantation.
Based on my experiences and background, I can benefit Fairchild Semiconductor in following ways.

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