디지털 논리회로 시계 타이머 스탑 와치 알람 만들기 maxplus이용 (코드, 보고서)

목차

1. FSM
2. block diagram
3. 설계 개요
4. waveform
5. 소스코드
6. 결과 토의

본문내용

module digitalclock
(swbutton1, swbutton2,set,reset,clk,segment1,segment2,segment3,segment4,segment5,segment6,led1,led2,led3,led16);

input swbutton1;
input swbutton2;

input set,reset;
input clk;

output [6:0] segment1, segment2,segment3,segment4, segment5, segment6;
output led1,led2,led3,led16;

reg[3:0] time1,time2,time3,time4,time5,time6;
reg[3:0] stime1,stime2,stime3,stime4,stime5,stime6;

reg nedsw1;
reg nedsw2;
reg nedreset;
reg timercheck;
reg nedset;

reg [6:0] segment1, segment2, segment3, segment4, segment5, segment6;
reg [3:0] alarm1, alarm2, alarm3, alarm4;
reg led1,led2,led3,led16;
reg [1:0] sw1;
reg [2:0] sw2;

reg [6:0] check1;
reg [6:0] check2;
reg [7:0] check3;

reg [3:0] stop1,stop2,stop3,stop4;
reg [3:0] print1,print2,print3,print4,print5,print6;

always @(posedge clk)
begin

if (sw1==0 && sw2==0) // LED 설정부분
sw2=3'b001;

if(sw1==0)
begin
led1=1; led2=0; led3=0;
end

if(sw1==1)
begin
led1=0; led2=1; led3=0;
end

if(sw1==2)
begin
led1=0; led2=0; led3=1;
end

참고 자료

없음

압축파일 내 파일목록

DIGITAL/LIB.DLS
DIGITAL/U4980888.DLS
DIGITAL/digitalclock(1).cnf
DIGITAL/digitalclock(10).cnf
DIGITAL/digitalclock(11).cnf
DIGITAL/digitalclock(12).cnf
DIGITAL/digitalclock(13).cnf
DIGITAL/digitalclock(2).cnf
DIGITAL/digitalclock(3).cnf
DIGITAL/digitalclock(4).cnf
DIGITAL/digitalclock(5).cnf
DIGITAL/digitalclock(6).cnf
DIGITAL/digitalclock(7).cnf
DIGITAL/digitalclock(8).cnf
DIGITAL/digitalclock(9).cnf
DIGITAL/digitalclock.acf
DIGITAL/digitalclock.cnf
DIGITAL/digitalclock.fit
DIGITAL/digitalclock.hex
DIGITAL/digitalclock.hif
DIGITAL/digitalclock.mmf
DIGITAL/digitalclock.ndb
DIGITAL/digitalclock.pin
DIGITAL/digitalclock.pof
DIGITAL/digitalclock.rpt
DIGITAL/digitalclock.scf
DIGITAL/digitalclock.snf
DIGITAL/digitalclock.sof
DIGITAL/digitalclock.ttf
DIGITAL/digitalclock.v
보고서.hwp

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