16bit booth multiplier verilog code
- 최초 등록일
- 2007.08.02
- 최종 저작일
- 2007.01
- 압축파일
- 가격 1,000원
소개글
16bit booth multiplier입니다.
booth encoder, partial product generation unit등 structural하게 coding하였습니다.
컴파일 실행환경
ModelSim
본문내용
`timescale 1 ns / 10 ps
module booth_mult (a, b, r);
input [15:0] a;
input [15:0] b;
output [31:0] r;
wire [31:0] r;
wire [7:0] X_sel;
wire [7:0] X_sel2;
wire [7:0] NEG_sel;
wire [16:0] PP0;
wire [16:0] PP1;
wire [16:0] PP2;
wire [16:0] PP3;
wire [16:0] PP4;
wire [16:0] PP5;
wire [16:0] PP6;
wire [16:0] PP7;
wire sum_n14, carry_n14;
wire sum_n13, carry_n13;
wire sum_n12, carry_n12;
wire sum_n11, carry_n11;
wire [1:0] sum_n10, carry_n10;
wire [1:0] sum_n9, carry_n9;
wire [2:0] sum_n8, carry_n8;
wire [2:0] sum_n7, carry_n7;
wire [3:0] sum_n6, carry_n6;
wire [3:0] sum_n5, carry_n5;
wire [4:0] sum_n4, carry_n4;
wire [4:0] sum_n3, carry_n3;
wire [5:0] sum_n2, carry_n2;
wire [5:0] sum_n1, carry_n1;
wire [6:0] sum0, carry0;
wire [6:0] sum1, carry1;
wire [6:0] sum2, carry2;
wire [6:0] sum3, carry3;
wire [6:0] sum4, carry4;
wire [5:0] sum5, carry5;
wire [5:0] sum6, carry6;
wire [4:0] sum7, carry7;
wire [4:0] sum8, carry8;
wire [3:0] sum9, carry9;
wire [3:0] sum10, carry10;
wire [2:0] sum11, carry11;
wire [2:0] sum12, carry12;
wire [1:0] sum13, carry13;
wire [1:0] sum14, carry14;
wire sum15, carry15;
wire sum16, carry16;
압축파일 내 파일목록
rtl/booth_enc.v
rtl/booth_mult.v
rtl/fa.v
rtl/ha.v
rtl/mult.v
rtl/mux2.v
rtl/partial_prod.v
rtl/tb.v
rtl/vma.v
참고 자료
없음